rewritePPC64latelower.go

     1  // Code generated from _gen/PPC64latelower.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package ssa
     4  
     5  import "internal/buildcfg"
     6  
     7  func rewriteValuePPC64latelower(v *Value) bool {
     8  	switch v.Op {
     9  	case OpPPC64ADD:
    10  		return rewriteValuePPC64latelower_OpPPC64ADD(v)
    11  	case OpPPC64AND:
    12  		return rewriteValuePPC64latelower_OpPPC64AND(v)
    13  	case OpPPC64ANDconst:
    14  		return rewriteValuePPC64latelower_OpPPC64ANDconst(v)
    15  	case OpPPC64CMPconst:
    16  		return rewriteValuePPC64latelower_OpPPC64CMPconst(v)
    17  	case OpPPC64ISEL:
    18  		return rewriteValuePPC64latelower_OpPPC64ISEL(v)
    19  	case OpPPC64RLDICL:
    20  		return rewriteValuePPC64latelower_OpPPC64RLDICL(v)
    21  	case OpPPC64RLDICLCC:
    22  		return rewriteValuePPC64latelower_OpPPC64RLDICLCC(v)
    23  	case OpPPC64SETBC:
    24  		return rewriteValuePPC64latelower_OpPPC64SETBC(v)
    25  	case OpPPC64SETBCR:
    26  		return rewriteValuePPC64latelower_OpPPC64SETBCR(v)
    27  	}
    28  	return false
    29  }
    30  func rewriteValuePPC64latelower_OpPPC64ADD(v *Value) bool {
    31  	v_1 := v.Args[1]
    32  	v_0 := v.Args[0]
    33  	// match: (ADD (MOVDconst [m]) x)
    34  	// cond: supportsPPC64PCRel() && (m<<30)>>30 == m
    35  	// result: (ADDconst [m] x)
    36  	for {
    37  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    38  			if v_0.Op != OpPPC64MOVDconst {
    39  				continue
    40  			}
    41  			m := auxIntToInt64(v_0.AuxInt)
    42  			x := v_1
    43  			if !(supportsPPC64PCRel() && (m<<30)>>30 == m) {
    44  				continue
    45  			}
    46  			v.reset(OpPPC64ADDconst)
    47  			v.AuxInt = int64ToAuxInt(m)
    48  			v.AddArg(x)
    49  			return true
    50  		}
    51  		break
    52  	}
    53  	return false
    54  }
    55  func rewriteValuePPC64latelower_OpPPC64AND(v *Value) bool {
    56  	v_1 := v.Args[1]
    57  	v_0 := v.Args[0]
    58  	// match: (AND <t> x:(MOVDconst [m]) n)
    59  	// cond: t.Size() <= 2
    60  	// result: (ANDconst [int64(int16(m))] n)
    61  	for {
    62  		t := v.Type
    63  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    64  			x := v_0
    65  			if x.Op != OpPPC64MOVDconst {
    66  				continue
    67  			}
    68  			m := auxIntToInt64(x.AuxInt)
    69  			n := v_1
    70  			if !(t.Size() <= 2) {
    71  				continue
    72  			}
    73  			v.reset(OpPPC64ANDconst)
    74  			v.AuxInt = int64ToAuxInt(int64(int16(m)))
    75  			v.AddArg(n)
    76  			return true
    77  		}
    78  		break
    79  	}
    80  	// match: (AND x:(MOVDconst [m]) n)
    81  	// cond: isPPC64ValidShiftMask(m)
    82  	// result: (RLDICL [encodePPC64RotateMask(0,m,64)] n)
    83  	for {
    84  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    85  			x := v_0
    86  			if x.Op != OpPPC64MOVDconst {
    87  				continue
    88  			}
    89  			m := auxIntToInt64(x.AuxInt)
    90  			n := v_1
    91  			if !(isPPC64ValidShiftMask(m)) {
    92  				continue
    93  			}
    94  			v.reset(OpPPC64RLDICL)
    95  			v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 64))
    96  			v.AddArg(n)
    97  			return true
    98  		}
    99  		break
   100  	}
   101  	// match: (AND x:(MOVDconst [m]) n)
   102  	// cond: m != 0 && isPPC64ValidShiftMask(^m)
   103  	// result: (RLDICR [encodePPC64RotateMask(0,m,64)] n)
   104  	for {
   105  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
   106  			x := v_0
   107  			if x.Op != OpPPC64MOVDconst {
   108  				continue
   109  			}
   110  			m := auxIntToInt64(x.AuxInt)
   111  			n := v_1
   112  			if !(m != 0 && isPPC64ValidShiftMask(^m)) {
   113  				continue
   114  			}
   115  			v.reset(OpPPC64RLDICR)
   116  			v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 64))
   117  			v.AddArg(n)
   118  			return true
   119  		}
   120  		break
   121  	}
   122  	// match: (AND <t> x:(MOVDconst [m]) n)
   123  	// cond: t.Size() == 4 && isPPC64WordRotateMask(m)
   124  	// result: (RLWINM [encodePPC64RotateMask(0,m,32)] n)
   125  	for {
   126  		t := v.Type
   127  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
   128  			x := v_0
   129  			if x.Op != OpPPC64MOVDconst {
   130  				continue
   131  			}
   132  			m := auxIntToInt64(x.AuxInt)
   133  			n := v_1
   134  			if !(t.Size() == 4 && isPPC64WordRotateMask(m)) {
   135  				continue
   136  			}
   137  			v.reset(OpPPC64RLWINM)
   138  			v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 32))
   139  			v.AddArg(n)
   140  			return true
   141  		}
   142  		break
   143  	}
   144  	return false
   145  }
   146  func rewriteValuePPC64latelower_OpPPC64ANDconst(v *Value) bool {
   147  	v_0 := v.Args[0]
   148  	// match: (ANDconst [m] x)
   149  	// cond: isPPC64ValidShiftMask(m)
   150  	// result: (RLDICL [encodePPC64RotateMask(0,m,64)] x)
   151  	for {
   152  		m := auxIntToInt64(v.AuxInt)
   153  		x := v_0
   154  		if !(isPPC64ValidShiftMask(m)) {
   155  			break
   156  		}
   157  		v.reset(OpPPC64RLDICL)
   158  		v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 64))
   159  		v.AddArg(x)
   160  		return true
   161  	}
   162  	return false
   163  }
   164  func rewriteValuePPC64latelower_OpPPC64CMPconst(v *Value) bool {
   165  	v_0 := v.Args[0]
   166  	// match: (CMPconst [0] z:(ADD x y))
   167  	// cond: v.Block == z.Block
   168  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   169  	for {
   170  		if auxIntToInt64(v.AuxInt) != 0 {
   171  			break
   172  		}
   173  		z := v_0
   174  		if z.Op != OpPPC64ADD {
   175  			break
   176  		}
   177  		if !(v.Block == z.Block) {
   178  			break
   179  		}
   180  		v.reset(OpPPC64CMPconst)
   181  		v.AuxInt = int64ToAuxInt(0)
   182  		v.AddArg(convertPPC64OpToOpCC(z))
   183  		return true
   184  	}
   185  	// match: (CMPconst [0] z:(AND x y))
   186  	// cond: v.Block == z.Block
   187  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   188  	for {
   189  		if auxIntToInt64(v.AuxInt) != 0 {
   190  			break
   191  		}
   192  		z := v_0
   193  		if z.Op != OpPPC64AND {
   194  			break
   195  		}
   196  		if !(v.Block == z.Block) {
   197  			break
   198  		}
   199  		v.reset(OpPPC64CMPconst)
   200  		v.AuxInt = int64ToAuxInt(0)
   201  		v.AddArg(convertPPC64OpToOpCC(z))
   202  		return true
   203  	}
   204  	// match: (CMPconst [0] z:(ANDN x y))
   205  	// cond: v.Block == z.Block
   206  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   207  	for {
   208  		if auxIntToInt64(v.AuxInt) != 0 {
   209  			break
   210  		}
   211  		z := v_0
   212  		if z.Op != OpPPC64ANDN {
   213  			break
   214  		}
   215  		if !(v.Block == z.Block) {
   216  			break
   217  		}
   218  		v.reset(OpPPC64CMPconst)
   219  		v.AuxInt = int64ToAuxInt(0)
   220  		v.AddArg(convertPPC64OpToOpCC(z))
   221  		return true
   222  	}
   223  	// match: (CMPconst [0] z:(OR x y))
   224  	// cond: v.Block == z.Block
   225  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   226  	for {
   227  		if auxIntToInt64(v.AuxInt) != 0 {
   228  			break
   229  		}
   230  		z := v_0
   231  		if z.Op != OpPPC64OR {
   232  			break
   233  		}
   234  		if !(v.Block == z.Block) {
   235  			break
   236  		}
   237  		v.reset(OpPPC64CMPconst)
   238  		v.AuxInt = int64ToAuxInt(0)
   239  		v.AddArg(convertPPC64OpToOpCC(z))
   240  		return true
   241  	}
   242  	// match: (CMPconst [0] z:(SUB x y))
   243  	// cond: v.Block == z.Block
   244  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   245  	for {
   246  		if auxIntToInt64(v.AuxInt) != 0 {
   247  			break
   248  		}
   249  		z := v_0
   250  		if z.Op != OpPPC64SUB {
   251  			break
   252  		}
   253  		if !(v.Block == z.Block) {
   254  			break
   255  		}
   256  		v.reset(OpPPC64CMPconst)
   257  		v.AuxInt = int64ToAuxInt(0)
   258  		v.AddArg(convertPPC64OpToOpCC(z))
   259  		return true
   260  	}
   261  	// match: (CMPconst [0] z:(NOR x y))
   262  	// cond: v.Block == z.Block
   263  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   264  	for {
   265  		if auxIntToInt64(v.AuxInt) != 0 {
   266  			break
   267  		}
   268  		z := v_0
   269  		if z.Op != OpPPC64NOR {
   270  			break
   271  		}
   272  		if !(v.Block == z.Block) {
   273  			break
   274  		}
   275  		v.reset(OpPPC64CMPconst)
   276  		v.AuxInt = int64ToAuxInt(0)
   277  		v.AddArg(convertPPC64OpToOpCC(z))
   278  		return true
   279  	}
   280  	// match: (CMPconst [0] z:(XOR x y))
   281  	// cond: v.Block == z.Block
   282  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   283  	for {
   284  		if auxIntToInt64(v.AuxInt) != 0 {
   285  			break
   286  		}
   287  		z := v_0
   288  		if z.Op != OpPPC64XOR {
   289  			break
   290  		}
   291  		if !(v.Block == z.Block) {
   292  			break
   293  		}
   294  		v.reset(OpPPC64CMPconst)
   295  		v.AuxInt = int64ToAuxInt(0)
   296  		v.AddArg(convertPPC64OpToOpCC(z))
   297  		return true
   298  	}
   299  	// match: (CMPconst [0] z:(NEG x))
   300  	// cond: v.Block == z.Block
   301  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   302  	for {
   303  		if auxIntToInt64(v.AuxInt) != 0 {
   304  			break
   305  		}
   306  		z := v_0
   307  		if z.Op != OpPPC64NEG {
   308  			break
   309  		}
   310  		if !(v.Block == z.Block) {
   311  			break
   312  		}
   313  		v.reset(OpPPC64CMPconst)
   314  		v.AuxInt = int64ToAuxInt(0)
   315  		v.AddArg(convertPPC64OpToOpCC(z))
   316  		return true
   317  	}
   318  	// match: (CMPconst [0] z:(CNTLZD x))
   319  	// cond: v.Block == z.Block
   320  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   321  	for {
   322  		if auxIntToInt64(v.AuxInt) != 0 {
   323  			break
   324  		}
   325  		z := v_0
   326  		if z.Op != OpPPC64CNTLZD {
   327  			break
   328  		}
   329  		if !(v.Block == z.Block) {
   330  			break
   331  		}
   332  		v.reset(OpPPC64CMPconst)
   333  		v.AuxInt = int64ToAuxInt(0)
   334  		v.AddArg(convertPPC64OpToOpCC(z))
   335  		return true
   336  	}
   337  	// match: (CMPconst [0] z:(RLDICL x))
   338  	// cond: v.Block == z.Block
   339  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   340  	for {
   341  		if auxIntToInt64(v.AuxInt) != 0 {
   342  			break
   343  		}
   344  		z := v_0
   345  		if z.Op != OpPPC64RLDICL {
   346  			break
   347  		}
   348  		if !(v.Block == z.Block) {
   349  			break
   350  		}
   351  		v.reset(OpPPC64CMPconst)
   352  		v.AuxInt = int64ToAuxInt(0)
   353  		v.AddArg(convertPPC64OpToOpCC(z))
   354  		return true
   355  	}
   356  	// match: (CMPconst [0] z:(ADDconst [c] x))
   357  	// cond: int64(int16(c)) == c && v.Block == z.Block
   358  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   359  	for {
   360  		if auxIntToInt64(v.AuxInt) != 0 {
   361  			break
   362  		}
   363  		z := v_0
   364  		if z.Op != OpPPC64ADDconst {
   365  			break
   366  		}
   367  		c := auxIntToInt64(z.AuxInt)
   368  		if !(int64(int16(c)) == c && v.Block == z.Block) {
   369  			break
   370  		}
   371  		v.reset(OpPPC64CMPconst)
   372  		v.AuxInt = int64ToAuxInt(0)
   373  		v.AddArg(convertPPC64OpToOpCC(z))
   374  		return true
   375  	}
   376  	// match: (CMPconst [0] z:(ANDconst [c] x))
   377  	// cond: int64(uint16(c)) == c && v.Block == z.Block
   378  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   379  	for {
   380  		if auxIntToInt64(v.AuxInt) != 0 {
   381  			break
   382  		}
   383  		z := v_0
   384  		if z.Op != OpPPC64ANDconst {
   385  			break
   386  		}
   387  		c := auxIntToInt64(z.AuxInt)
   388  		if !(int64(uint16(c)) == c && v.Block == z.Block) {
   389  			break
   390  		}
   391  		v.reset(OpPPC64CMPconst)
   392  		v.AuxInt = int64ToAuxInt(0)
   393  		v.AddArg(convertPPC64OpToOpCC(z))
   394  		return true
   395  	}
   396  	// match: (CMPconst <t> [0] (Select0 z:(ADDCC x y)))
   397  	// result: (Select1 <t> z)
   398  	for {
   399  		t := v.Type
   400  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   401  			break
   402  		}
   403  		z := v_0.Args[0]
   404  		if z.Op != OpPPC64ADDCC {
   405  			break
   406  		}
   407  		v.reset(OpSelect1)
   408  		v.Type = t
   409  		v.AddArg(z)
   410  		return true
   411  	}
   412  	// match: (CMPconst <t> [0] (Select0 z:(ANDCC x y)))
   413  	// result: (Select1 <t> z)
   414  	for {
   415  		t := v.Type
   416  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   417  			break
   418  		}
   419  		z := v_0.Args[0]
   420  		if z.Op != OpPPC64ANDCC {
   421  			break
   422  		}
   423  		v.reset(OpSelect1)
   424  		v.Type = t
   425  		v.AddArg(z)
   426  		return true
   427  	}
   428  	// match: (CMPconst <t> [0] (Select0 z:(ANDNCC x y)))
   429  	// result: (Select1 <t> z)
   430  	for {
   431  		t := v.Type
   432  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   433  			break
   434  		}
   435  		z := v_0.Args[0]
   436  		if z.Op != OpPPC64ANDNCC {
   437  			break
   438  		}
   439  		v.reset(OpSelect1)
   440  		v.Type = t
   441  		v.AddArg(z)
   442  		return true
   443  	}
   444  	// match: (CMPconst <t> [0] (Select0 z:(ORCC x y)))
   445  	// result: (Select1 <t> z)
   446  	for {
   447  		t := v.Type
   448  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   449  			break
   450  		}
   451  		z := v_0.Args[0]
   452  		if z.Op != OpPPC64ORCC {
   453  			break
   454  		}
   455  		v.reset(OpSelect1)
   456  		v.Type = t
   457  		v.AddArg(z)
   458  		return true
   459  	}
   460  	// match: (CMPconst <t> [0] (Select0 z:(SUBCC x y)))
   461  	// result: (Select1 <t> z)
   462  	for {
   463  		t := v.Type
   464  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   465  			break
   466  		}
   467  		z := v_0.Args[0]
   468  		if z.Op != OpPPC64SUBCC {
   469  			break
   470  		}
   471  		v.reset(OpSelect1)
   472  		v.Type = t
   473  		v.AddArg(z)
   474  		return true
   475  	}
   476  	// match: (CMPconst <t> [0] (Select0 z:(NORCC x y)))
   477  	// result: (Select1 <t> z)
   478  	for {
   479  		t := v.Type
   480  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   481  			break
   482  		}
   483  		z := v_0.Args[0]
   484  		if z.Op != OpPPC64NORCC {
   485  			break
   486  		}
   487  		v.reset(OpSelect1)
   488  		v.Type = t
   489  		v.AddArg(z)
   490  		return true
   491  	}
   492  	// match: (CMPconst <t> [0] (Select0 z:(XORCC x y)))
   493  	// result: (Select1 <t> z)
   494  	for {
   495  		t := v.Type
   496  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   497  			break
   498  		}
   499  		z := v_0.Args[0]
   500  		if z.Op != OpPPC64XORCC {
   501  			break
   502  		}
   503  		v.reset(OpSelect1)
   504  		v.Type = t
   505  		v.AddArg(z)
   506  		return true
   507  	}
   508  	// match: (CMPconst <t> [0] (Select0 z:(ADDCCconst y)))
   509  	// result: (Select1 <t> z)
   510  	for {
   511  		t := v.Type
   512  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   513  			break
   514  		}
   515  		z := v_0.Args[0]
   516  		if z.Op != OpPPC64ADDCCconst {
   517  			break
   518  		}
   519  		v.reset(OpSelect1)
   520  		v.Type = t
   521  		v.AddArg(z)
   522  		return true
   523  	}
   524  	// match: (CMPconst <t> [0] (Select0 z:(ANDCCconst y)))
   525  	// result: (Select1 <t> z)
   526  	for {
   527  		t := v.Type
   528  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   529  			break
   530  		}
   531  		z := v_0.Args[0]
   532  		if z.Op != OpPPC64ANDCCconst {
   533  			break
   534  		}
   535  		v.reset(OpSelect1)
   536  		v.Type = t
   537  		v.AddArg(z)
   538  		return true
   539  	}
   540  	// match: (CMPconst <t> [0] (Select0 z:(NEGCC y)))
   541  	// result: (Select1 <t> z)
   542  	for {
   543  		t := v.Type
   544  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   545  			break
   546  		}
   547  		z := v_0.Args[0]
   548  		if z.Op != OpPPC64NEGCC {
   549  			break
   550  		}
   551  		v.reset(OpSelect1)
   552  		v.Type = t
   553  		v.AddArg(z)
   554  		return true
   555  	}
   556  	// match: (CMPconst <t> [0] (Select0 z:(CNTLZDCC y)))
   557  	// result: (Select1 <t> z)
   558  	for {
   559  		t := v.Type
   560  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   561  			break
   562  		}
   563  		z := v_0.Args[0]
   564  		if z.Op != OpPPC64CNTLZDCC {
   565  			break
   566  		}
   567  		v.reset(OpSelect1)
   568  		v.Type = t
   569  		v.AddArg(z)
   570  		return true
   571  	}
   572  	// match: (CMPconst <t> [0] (Select0 z:(RLDICLCC y)))
   573  	// result: (Select1 <t> z)
   574  	for {
   575  		t := v.Type
   576  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   577  			break
   578  		}
   579  		z := v_0.Args[0]
   580  		if z.Op != OpPPC64RLDICLCC {
   581  			break
   582  		}
   583  		v.reset(OpSelect1)
   584  		v.Type = t
   585  		v.AddArg(z)
   586  		return true
   587  	}
   588  	return false
   589  }
   590  func rewriteValuePPC64latelower_OpPPC64ISEL(v *Value) bool {
   591  	v_2 := v.Args[2]
   592  	v_1 := v.Args[1]
   593  	v_0 := v.Args[0]
   594  	// match: (ISEL [a] x (MOVDconst [0]) z)
   595  	// result: (ISELZ [a] x z)
   596  	for {
   597  		a := auxIntToInt32(v.AuxInt)
   598  		x := v_0
   599  		if v_1.Op != OpPPC64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
   600  			break
   601  		}
   602  		z := v_2
   603  		v.reset(OpPPC64ISELZ)
   604  		v.AuxInt = int32ToAuxInt(a)
   605  		v.AddArg2(x, z)
   606  		return true
   607  	}
   608  	// match: (ISEL [a] (MOVDconst [0]) y z)
   609  	// result: (ISELZ [a^0x4] y z)
   610  	for {
   611  		a := auxIntToInt32(v.AuxInt)
   612  		if v_0.Op != OpPPC64MOVDconst || auxIntToInt64(v_0.AuxInt) != 0 {
   613  			break
   614  		}
   615  		y := v_1
   616  		z := v_2
   617  		v.reset(OpPPC64ISELZ)
   618  		v.AuxInt = int32ToAuxInt(a ^ 0x4)
   619  		v.AddArg2(y, z)
   620  		return true
   621  	}
   622  	return false
   623  }
   624  func rewriteValuePPC64latelower_OpPPC64RLDICL(v *Value) bool {
   625  	v_0 := v.Args[0]
   626  	// match: (RLDICL [em] x:(SRDconst [s] a))
   627  	// cond: (em&0xFF0000) == 0
   628  	// result: (RLDICL [mergePPC64RLDICLandSRDconst(em, s)] a)
   629  	for {
   630  		em := auxIntToInt64(v.AuxInt)
   631  		x := v_0
   632  		if x.Op != OpPPC64SRDconst {
   633  			break
   634  		}
   635  		s := auxIntToInt64(x.AuxInt)
   636  		a := x.Args[0]
   637  		if !((em & 0xFF0000) == 0) {
   638  			break
   639  		}
   640  		v.reset(OpPPC64RLDICL)
   641  		v.AuxInt = int64ToAuxInt(mergePPC64RLDICLandSRDconst(em, s))
   642  		v.AddArg(a)
   643  		return true
   644  	}
   645  	return false
   646  }
   647  func rewriteValuePPC64latelower_OpPPC64RLDICLCC(v *Value) bool {
   648  	v_0 := v.Args[0]
   649  	// match: (RLDICLCC [a] x)
   650  	// cond: convertPPC64RldiclAndccconst(a) != 0
   651  	// result: (ANDCCconst [convertPPC64RldiclAndccconst(a)] x)
   652  	for {
   653  		a := auxIntToInt64(v.AuxInt)
   654  		x := v_0
   655  		if !(convertPPC64RldiclAndccconst(a) != 0) {
   656  			break
   657  		}
   658  		v.reset(OpPPC64ANDCCconst)
   659  		v.AuxInt = int64ToAuxInt(convertPPC64RldiclAndccconst(a))
   660  		v.AddArg(x)
   661  		return true
   662  	}
   663  	return false
   664  }
   665  func rewriteValuePPC64latelower_OpPPC64SETBC(v *Value) bool {
   666  	v_0 := v.Args[0]
   667  	b := v.Block
   668  	typ := &b.Func.Config.Types
   669  	// match: (SETBC [2] cmp)
   670  	// cond: buildcfg.GOPPC64 <= 9
   671  	// result: (ISELZ [2] (MOVDconst [1]) cmp)
   672  	for {
   673  		if auxIntToInt32(v.AuxInt) != 2 {
   674  			break
   675  		}
   676  		cmp := v_0
   677  		if !(buildcfg.GOPPC64 <= 9) {
   678  			break
   679  		}
   680  		v.reset(OpPPC64ISELZ)
   681  		v.AuxInt = int32ToAuxInt(2)
   682  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   683  		v0.AuxInt = int64ToAuxInt(1)
   684  		v.AddArg2(v0, cmp)
   685  		return true
   686  	}
   687  	// match: (SETBC [0] cmp)
   688  	// cond: buildcfg.GOPPC64 <= 9
   689  	// result: (ISELZ [0] (MOVDconst [1]) cmp)
   690  	for {
   691  		if auxIntToInt32(v.AuxInt) != 0 {
   692  			break
   693  		}
   694  		cmp := v_0
   695  		if !(buildcfg.GOPPC64 <= 9) {
   696  			break
   697  		}
   698  		v.reset(OpPPC64ISELZ)
   699  		v.AuxInt = int32ToAuxInt(0)
   700  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   701  		v0.AuxInt = int64ToAuxInt(1)
   702  		v.AddArg2(v0, cmp)
   703  		return true
   704  	}
   705  	// match: (SETBC [1] cmp)
   706  	// cond: buildcfg.GOPPC64 <= 9
   707  	// result: (ISELZ [1] (MOVDconst [1]) cmp)
   708  	for {
   709  		if auxIntToInt32(v.AuxInt) != 1 {
   710  			break
   711  		}
   712  		cmp := v_0
   713  		if !(buildcfg.GOPPC64 <= 9) {
   714  			break
   715  		}
   716  		v.reset(OpPPC64ISELZ)
   717  		v.AuxInt = int32ToAuxInt(1)
   718  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   719  		v0.AuxInt = int64ToAuxInt(1)
   720  		v.AddArg2(v0, cmp)
   721  		return true
   722  	}
   723  	return false
   724  }
   725  func rewriteValuePPC64latelower_OpPPC64SETBCR(v *Value) bool {
   726  	v_0 := v.Args[0]
   727  	b := v.Block
   728  	typ := &b.Func.Config.Types
   729  	// match: (SETBCR [2] cmp)
   730  	// cond: buildcfg.GOPPC64 <= 9
   731  	// result: (ISELZ [6] (MOVDconst [1]) cmp)
   732  	for {
   733  		if auxIntToInt32(v.AuxInt) != 2 {
   734  			break
   735  		}
   736  		cmp := v_0
   737  		if !(buildcfg.GOPPC64 <= 9) {
   738  			break
   739  		}
   740  		v.reset(OpPPC64ISELZ)
   741  		v.AuxInt = int32ToAuxInt(6)
   742  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   743  		v0.AuxInt = int64ToAuxInt(1)
   744  		v.AddArg2(v0, cmp)
   745  		return true
   746  	}
   747  	// match: (SETBCR [0] cmp)
   748  	// cond: buildcfg.GOPPC64 <= 9
   749  	// result: (ISELZ [4] (MOVDconst [1]) cmp)
   750  	for {
   751  		if auxIntToInt32(v.AuxInt) != 0 {
   752  			break
   753  		}
   754  		cmp := v_0
   755  		if !(buildcfg.GOPPC64 <= 9) {
   756  			break
   757  		}
   758  		v.reset(OpPPC64ISELZ)
   759  		v.AuxInt = int32ToAuxInt(4)
   760  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   761  		v0.AuxInt = int64ToAuxInt(1)
   762  		v.AddArg2(v0, cmp)
   763  		return true
   764  	}
   765  	// match: (SETBCR [1] cmp)
   766  	// cond: buildcfg.GOPPC64 <= 9
   767  	// result: (ISELZ [5] (MOVDconst [1]) cmp)
   768  	for {
   769  		if auxIntToInt32(v.AuxInt) != 1 {
   770  			break
   771  		}
   772  		cmp := v_0
   773  		if !(buildcfg.GOPPC64 <= 9) {
   774  			break
   775  		}
   776  		v.reset(OpPPC64ISELZ)
   777  		v.AuxInt = int32ToAuxInt(5)
   778  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   779  		v0.AuxInt = int64ToAuxInt(1)
   780  		v.AddArg2(v0, cmp)
   781  		return true
   782  	}
   783  	return false
   784  }
   785  func rewriteBlockPPC64latelower(b *Block) bool {
   786  	return false
   787  }
   788
View as plain text